RV64D Instructions

fcvt.l.d

31-27 26-25 24-20 19-15 14-12 11-7 6-2 1-0
11000 01 00010 rs1 rm rd 10100 11
Format:
fcvt.l.d rd,rs1
Description:

Implementation:
x[rd] = s64_{f64}(f[rs1])

fcvt.lu.d

31-27 26-25 24-20 19-15 14-12 11-7 6-2 1-0
11000 01 00011 rs1 rm rd 10100 11
Format:
fcvt.lu.d rd,rs1
Description:

Implementation:
x[rd] = u64_{f64}(f[rs1])

fmv.x.d

31-27 26-25 24-20 19-15 14-12 11-7 6-2 1-0
11100 01 00000 rs1 000 rd 10100 11
Format:
fmv.x.d rd,rs1
Description:

Implementation:
x[rd] = f[rs1][63:0]

fcvt.d.l

31-27 26-25 24-20 19-15 14-12 11-7 6-2 1-0
11010 01 00010 rs1 rm rd 10100 11
Format:
fcvt.d.l rd,rs1
Description:

Implementation:
f[rd] = f64_{s64}(x[rs1])

fcvt.d.lu

31-27 26-25 24-20 19-15 14-12 11-7 6-2 1-0
11010 01 00011 rs1 rm rd 10100 11
Format:
fcvt.d.lu rd,rs1
Description:

Implementation:
f[rd] = f64_{u64}(x[rs1])

fmv.d.x

31-27 26-25 24-20 19-15 14-12 11-7 6-2 1-0
11110 01 00000 rs1 000 rd 10100 11
Format:
fmv.d.x rd,rs1
Description:

Implementation:
f[rd] = x[rs1][63:0]