RV64F Instructions¶
fcvt.l.s¶
| 31-27 | 26-25 | 24-20 | 19-15 | 14-12 | 11-7 | 6-2 | 1-0 |
| 11000 | 00 | 00010 | rs1 | rm | rd | 10100 | 11 |
| Format: | fcvt.l.s rd,rs1
|
|---|---|
| Description: | |
| Implementation: | x[rd] = s64_{f32}(f[rs1])
|
fcvt.lu.s¶
| 31-27 | 26-25 | 24-20 | 19-15 | 14-12 | 11-7 | 6-2 | 1-0 |
| 11000 | 00 | 00011 | rs1 | rm | rd | 10100 | 11 |
| Format: | fcvt.lu.s rd,rs1
|
|---|---|
| Description: | |
| Implementation: | x[rd] = u64_{f32}(f[rs1])
|
fcvt.s.l¶
| 31-27 | 26-25 | 24-20 | 19-15 | 14-12 | 11-7 | 6-2 | 1-0 |
| 11010 | 00 | 00010 | rs1 | rm | rd | 10100 | 11 |
| Format: | fcvt.s.l rd,rs1
|
|---|---|
| Description: | |
| Implementation: | f[rd] = f32_{s64}(x[rs1])
|
fcvt.s.lu¶
| 31-27 | 26-25 | 24-20 | 19-15 | 14-12 | 11-7 | 6-2 | 1-0 |
| 11010 | 00 | 00011 | rs1 | rm | rd | 10100 | 11 |
| Format: | fcvt.s.lu rd,rs1
|
|---|---|
| Description: | |
| Implementation: | f[rd] = f32_{u64}(x[rs1])
|